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| FDP7N50U/FDPF7N50U 500V N-Channel MOSFET March 2007 FDP7N50U/FDPF7N50U 500V N-Channel MOSFET Features * 5A, 500V, RDS(on) = 1.5 @VGS = 10 V * Low gate charge ( typical 12.8 nC) * Low Crss ( typical 9 pF) * Fast switching * 100% avalanche tested * Improved dv/dt capability UniFET Description TM These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficient switched mode power supplies and active power factor correction. D G GDS TO-220 FDP Series GD S TO-220F FDPF Series S Absolute Maximum Ratings Symbol VDSS ID IDM VGSS EAS IAR EAR dv/dt PD TJ, TSTG TL Drain-Source Voltage Drain Current Drain Current Gate-Source voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TC = 25C) - Derate above 25C (Note 2) (Note 1) (Note 1) (Note 3) Parameter - Continuous (TC = 25C) - Continuous (TC = 100C) - Pulsed (Note 1) FDP7N50U 5 3.0 20 FDPF7N50U 500 5* 3.0 * 20 * 30 270 5 8.9 4.5 Unit V A A A V mJ A mJ V/ns 89 0.71 -55 to +150 300 39 0.31 W W/C C C Operating and Storage Temperature Range Maximum Lead Temperature for Soldering Purpose, 1/8" from Case for 5 Seconds * Drain current limited by maximum junction temperature. Thermal Characteristics Symbol RJC RCS RJA Parameter Thermal Resistance, Junction-to-Case Thermal Resistance, Case-to-Sink Typ. Thermal Resistance, Junction-to-Ambient FDP7N50U 1.4 0.5 62.5 FDPF7N50U 3.2 -62.5 Unit C/W C/W C/W (c)2007 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com FDP7N50U/FDPF7N50U REV. B FDP7N50U/FDPF7N50U 500V N-Channel MOSFET Package Marking and Ordering Information Device Marking FDP7N50U FDPF7N50U Device FDP7N50U FDPF7N50U Package TO-220 TO-220F TC = 25C unless otherwise noted Reel Size --- Tape Width --- Quantity 50 50 Electrical Characteristics Symbol Off Characteristics BVDSS BVDSS / TJ IDSS IGSSF IGSSR VGS(th) RDS(on) gFS Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd IS ISM VSD trr Qrr NOTES: Parameter Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage Current, Forward Gate-Body Leakage Current, Reverse Gate Threshold Voltage Static Drain-Source On-Resistance Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Conditions VGS = 0V, ID = 250A ID = 250A, Referenced to 25C VDS = 500V, VGS = 0V VDS = 400V, TC = 125C VGS = 30V, VDS = 0V VGS = -30V, VDS = 0V VDS = VGS, ID = 250A VGS = 10V, ID = 2.5A VDS = 40V, ID = 2.5A VDS = 25V, VGS = 0V, f = 1.0MHz (Note 4) Min. 500 -----3.0 ------ Typ. -0.5 -----1.2 2.5 720 95 9 6 55 25 35 12.8 3.7 5.8 Max Units --25 250 100 -100 5.0 1.5 -940 190 13.5 20 120 60 80 16.6 --V V/C A A nA nA V S pF pF pF ns ns ns ns nC nC nC On Characteristics Dynamic Characteristics Switching Characteristics VDD = 250V, ID = 7A RG = 25 (Note 4, 5) ------(Note 4, 5) VDS = 400V, ID = 7A VGS = 10V -- Drain-Source Diode Characteristics and Maximum Ratings Maximum Continuous Drain-Source Diode Forward Current Maximum Pulsed Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0V, IS = 7A VGS = 0V, IS = 7A dIF/dt =100A/s (Note 4) ------ ---40 0.04 5 20 1.6 --- A A V ns C 1. Repetitive Rating: Pulse width limited by maximum junction temperature 2. IAS = 7A, VDD = 50V, L=10mH, RG = 25, Starting TJ = 25C 3. ISD 7A, di/dt 200A/s, VDD BVDSS, Starting TJ = 25C 4. Pulse Test: Pulse width 300s, Duty Cycle 2% 5. Essentially Independent of Operating Temperature Typical Characteristics FDP7N50U/FDPF7N50U REV. B 2 www.fairchildsemi.com FDP7N50U/FDPF7N50U 500V N-Channel MOSFET Typical Performance Characteristics Figure 1. On-Region Characteristics 20 Top : VGS 10.0 V 8.0V 7.5 V 7.0 V 6.5 V 6.0 V 5.5 V 5.0 V Figure 2. Transfer Characteristics 10 1 ID , Drain Current [A] 15 ID, Drain Current [A] 150 10 0 Bottom : 10 25 5 Notes : 1. 250 s Pulse Test 2. TC = 25 10 -1 Note 1. VDS = 40V 2. 250 s Pulse Test 0 0 10 20 30 40 50 10 -2 VDS, Drain-Source Voltage [V] 2 4 6 8 10 VGS , Gate-Source Voltage [V] Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature RDS(ON) [ ],Drain-Source On-Resistance 2.5 IDR , Reverse Drain Current [A] 2.0 10 1 VGS = 10V 1.5 1.0 VGS = 20V 10 0 150 25 Notes : 1. VGS = 0V 2. 250 s Pulse Test 0.5 Note : TJ = 25 0.0 0 5 10 15 20 10 -1 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 ID, Drain Current [A] VSD , Source-Drain Voltage [V] Figure 5. Capacitance Characteristics 12 Figure 6. Gate Charge Characteristics Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd VDS = 100V 1000 VGS, Gate-Source Voltage [V] 10 VDS = 250V VDS = 400V Ciss Coss Capacitance [pF] 8 6 100 Crss Notes : 1. VGS = 0 V 2. f = 1 MHz 4 2 Note : ID = 7 A 10 0 1 0 10 10 0 5 10 15 VDS, Drain-Source Voltage [V] QG, Total Gate Charge [nC] FDP7N50U/FDPF7N50U REV. B 3 www.fairchildsemi.com FDP7N50U/FDPF7N50U 500V N-Channel MOSFET Typical Performance Characteristics (Continued) Figure 7. Breakdown Voltage Variation vs. Temperature 1.2 6 Figure 8. Maximum Drain Current Vs. Case Temperature BVDSS, (Normalized) Drain-Source Breakdown Voltage 1.1 ID, Drain Current [A] 200 4 1.0 0.9 Notes : 2 1. VGS = 0 V 2. ID = 250 A 0.8 -100 -50 0 50 100 o 150 0 25 50 75 100 125 150 TJ, Junction Temperature [ C] TC, Case Temperature [ ] Figure 9-1. Maximum Safe Operating Area - FDP7N50U Figure 9-2. Maximum Safe Operating Area - FDPF7N50U 10 1 10 us 10 1 10 us 100 us 1 ms 10 ms Operation in This Area is Limited by R DS(on) ID, Drain Current [A] 10 ms 10 0 ID, Drain Current [A] 100 us 1 ms DC Operation in This Area is Limited by R DS(on) 10 0 DC 10 -1 Notes : 1. TC = 25 C 2. TJ = 150 C 3. Single Pulse o o 10 -1 Notes : 1. TC = 25 C 2. TJ = 150 C 3. Single Pulse o o 10 -2 10 0 10 1 10 2 10 -2 10 0 10 1 10 2 VDS, Drain-Source Voltage [V] VDS, Drain-Source Voltage [V] FDP7N50U/FDPF7N50U REV. B 4 www.fairchildsemi.com FDP7N50U/FDPF7N50U 500V N-Channel MOSFET Figure 10-1. Transient Thermal Response Curve - FDP7N50U 10 0 Z JC Thermal Response (t), D = 0 .5 0 .2 0 .1 10 -1 0 .0 5 0 .0 2 0 .0 1 PDM t1 t2 s in g le p u ls e 10 -2 N o te s : 1 . Z J C = 1 .4 (t) /W M a x. 2 . D u ty F a c to r, D = t 1 /t 2 3 . T JM - T C = P DM * Z JC (t) 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 t 1 , S q u a re W a v e P u ls e D u ra tio n [s e c ] Figure 10-2. Transient Thermal Response Curve - FDPF7N50U D = 0 .5 Z JC Thermal Response (t), 10 0 0 .2 0 .1 0 .0 5 10 -1 PDM t1 t2 0 .0 2 0 .0 1 10 -2 -5 s in g le p u ls e 10 -4 N o te s : 1 . Z JC = 3 .2 (t) /W M a x. 2 . D u ty F a c to r, D = t 1 /t 2 3 . T JM - T C = P D M * Z JC (t) 10 10 -3 10 -2 10 -1 10 0 10 1 t 1 , S q u a re W a v e P u ls e D u ra tio n [s e c ] FDP7N50U/FDPF7N50U REV. B 5 www.fairchildsemi.com FDP7N50U/FDPF7N50U 500V N-Channel MOSFET Gate Charge Test Circuit & Waveform Resistive Switching Test Circuit & Waveforms Unclamped Inductive Switching Test Circuit & Waveforms FDP7N50U/FDPF7N50U REV. B 6 www.fairchildsemi.com FDP7N50U/FDPF7N50U 500V N-Channel MOSFET Peak Diode Recovery dv/dt Test Circuit & Waveforms FDP7N50U/FDPF7N50U REV. B 7 www.fairchildsemi.com FDP7N50U/FDPF7N50U 500V N-Channel MOSFET Mechanical Dimensions TO-220 Dimensions in Millimeters FDP7N50U/FDPF7N50U REV. B 8 www.fairchildsemi.com FDP7N50U/FDPF7N50U 500V N-Channel MOSFET Mechanical Dimensions (Continued) TO-220F 3.30 0.10 10.16 0.20 (7.00) o3.18 0.10 2.54 0.20 (0.70) 6.68 0.20 15.80 0.20 (1.00x45) MAX1.47 9.75 0.30 0.80 0.10 (3 ) 0 0.35 0.10 2.54TYP [2.54 0.20] #1 0.50 -0.05 2.54TYP [2.54 0.20] 4.70 0.20 +0.10 2.76 0.20 9.40 0.20 Dimensions in Millimeters FDP7N50U/FDPF7N50U REV. B 9 15.87 0.20 www.fairchildsemi.com TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx Across the board. Around the world.TM ActiveArrayTM BottomlessTM Build it NowTM CoolFETTM CROSSVOLTTM CTLTM Current Transfer LogicTM DOMETM 2 E CMOSTM (R) EcoSPARK EnSignaTM FACT Quiet SeriesTM (R) FACT (R) FAST FASTrTM FPSTM (R) FRFET GlobalOptoisolatorTM GTOTM (R) HiSeCTM i-LoTM ImpliedDisconnectTM IntelliMAXTM ISOPLANARTM MICROCOUPLERTM MicroPakTM MICROWIRETM MSXTM MSXProTM OCXTM OCXProTM (R) OPTOLOGIC (R) OPTOPLANAR PACMANTM POPTM (R) Power220 (R) Power247 PowerEdgeTM PowerSaverTM (R) PowerTrench Programmable Active DroopTM (R) QFET QSTM QT OptoelectronicsTM Quiet SeriesTM RapidConfigureTM RapidConnectTM ScalarPumpTM SMART STARTTM (R) SPM STEALTHTM SuperFETTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TCMTM (R) The Power Franchise TM TinyLogic TINYOPTOTM TinyPowerTM TinyWireTM TruTranslationTM SerDesTM (R) UHC UniFETTM VCXTM WireTM (R) TinyBoostTM TinyBuckTM DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD'S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Preliminary Product Status Formative or In Design First Production Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild Semiconductor. The datasheet is printed for reference information only. Rev. I24 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. No Identification Needed Full Production Obsolete Not In Production (c) 2007 Fairchild Semiconductor Corporation www.fairchildsemi.com |
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